1. Technical Field
Several aspects of the present invention relate to a method for producing a 3C-SiC epitaxial layer and a semiconductor device.
2. Related Art
SiC is a wide gap semiconductor having a band gap twice or more wider than that of Si, and is expected to be used as a material for, for example, a high voltage device. SiC has many polytypes, and as representative polytypes, a hexagonal 4H-SiC polytype, a hexagonal 6H-SiC polytype, and a cubic 3C-SiC polytype are known. These polytypes have different electrical characteristics, and therefore, are expected to be used for different applications.
SiC is a material having a high melting point, and it is difficult to produce a single crystal substrate. Due to this, in the production of a SiC device, heteroepitaxial growth of SiC on a Si substrate has been examined. However, when heteroepitaxial growth of SiC on a Si substrate is performed, the growth temperature is around 1350° C., which is very high and close to the melting point (1420° C.) of silicon. Therefore, when the temperature of a Si substrate is increased to the growth temperature, Si sublimes from the surface of the substrate, and epitaxial growth cannot be performed normally. As measures for this, a technique for carbonizing the surface of a Si substrate to prevent sublimation is known. On the carbonized Si substrate, SiC can be epitaxially grown.
However, the lattice constants of Si and 3C-SiC are 5.43 Å and 4.36 Å, respectively, and there is an about 20% difference. Due to this, many crystal defects are formed at a boundary surface between 3C-SiC and Si, and the formed defects propagate to a 3C-SiC epitaxial layer. In order to improve the quality of the epitaxial layer, and further to improve the characteristics of the device, it is necessary to reduce the crystal defects in the epitaxial layer. Further, internal stress caused by a difference in lattice constant and a difference in thermal expansion coefficient, a problem occurs such that the substrate is bowed into a downward convex shape or a crack occurs. When an electronic device is produced on a surface of a substrate, bowing of the substrate or a crack becomes an obstacle to the production process.
JP-A-11-186178 (PTL 1) discloses a technique for forming a pattern in a non-growth region formed on a substrate or a laminated layer in the form of a dot, a stripe, a lattice, or the like in order to prevent bowing of a substrate or a crack.
The technique disclosed in PTL 1 requires multiple processing steps such as an oxide film forming step, a patterning step using a photomask, and an etching step for forming a pattern in a non-growth region, and therefore, a processing cost is increased. Further, according to the technique disclosed in PTL 1, bowing of a substrate is reduced, however, there is still a room for improvement.